ATmega8 Timers

When we talk about microcontrollers in the context of small computer systems, we're essentially highlighting their knack for managing tasks that revolve around timing.

Think of it this way: At its simplest, you can set up a microcontroller to, say, turn on a light when the clock hits 7 PM. But if we dive a bit deeper, we can also use it to adjust how fast a motor runs by sending it specific signals. Quite versatile, isn't it?

The ATmega8 microcontroller, a popular device in the AVR family, boasts a multitude of features. Among these, the timers stand out for their versatility and utility. This guide delves deep into ATmega8 timers, shedding light on their various modes, uses, and intricate details.

bar_chart Timers in microcontrollers are akin to stopwatches in the real world. They help measure and manage time intervals, generate precise delays, and produce waveforms. The ATmega8 comes equipped with three timers: Timer0, Timer1, and Timer2. While Timer 0 and Timer 2 are 8-bit timers, Timer 1 is a 16-bit one, offering extended functionality.

Timer/Counter 0 Registers

TCCR0 (Timer/Counter Control Register 0)

• CS02, CS01, CS00

  Clock Select: These bits determine the clock source for Timer0. They also set the prescaling factor (if any).

TCNT0 (Timer/Counter Register 0)

• Counter (BIT 7-0)

  This 8-bit value represents the current value of Timer0. It counts upwards and overflows back to 0 after reaching its maximum value.

Timer/Counter 1 Registers

TCCR1 (Timer/Counter Control Register 1A)

• COM1A1 and COM1A0

  Compare Output Mode for Channel A: These bits determine the behavior of the OC1A pin (usually associated with Timer1 Channel A) during compare matches and waveform generation modes.

• COM1B1 and COM1B0

  Compare Output Mode for Channel B: They determine the behavior of the OC1B pin (usually associated with Timer1 Channel B) during compare matches and waveform generation modes.

• FOC1A and FOC1B

  Force Output Compare for Channel A and B: Used for non-PWM mode. When written to logic one, they can force a compare match on either OC1A or OC1B pins.

• WGM11 and WGM10

  Waveform Generation Mode: These bits, combined with WGM12 and WGM13 from TCCR1B, specify the mode of operation of Timer1 (Normal, CTC, PWM, etc.).

TCCR1B (Timer/Counter Control Register 1B)

• ICNC1

  Input Capture Noise Canceler: If activated, it reduces the chance of capturing noise spikes. It introduces additional noise filtering on the input capture pin.

• ICES1

  Input Capture Edge Select: Determines which edge (rising or falling) on the input capture pin will trigger an input capture event.

• WGM13 and WGM12

  Waveform Generation Mode: These bits, combined with WGM11 and WGM10 from TCCR1A, define the mode of operation for Timer1.

• CS12, CS11, CS10

  Clock Select: These bits determine the clock source for Timer1. They also configure the prescaling factor (if any).

TCNT1H & TCNT1L (Timer/Counter Register 1 High & Low)

• Counter (BIT 15-0)

  This 16-bit value (combined from 8-bit high and low registers) indicates the current value of Timer1. It counts upwards and overflows back to 0 after reaching its maximum value of 65,535.

OCR1A & OCR1B (Output Compare Register 1A & 1B)

• Compare (BIT 15-0)

  These 16-bit values (each combined from 8-bit high and low registers) are used for comparison against the TCNT1 register. Depending on the mode set in TCCR1A and TCCR1B, certain operations can be triggered when a match occurs.

ICR1 (Input Capture Register 1)

• Capture (BIT 15-0)

  This 16-bit value captures the TCNT1 value at a moment defined by an external event, typically the edge of an input signal. It's especially useful for measuring external frequencies or pulse widths.

Timer/Counter 2 Registers

TCCR2 (Timer/Counter Control Register 2)

• FOC2

  Force Output Compare: Not directly accessible by software. It's used for non-PWM mode. When written to logic one, it can set the OC2 pin regardless of the compare match.

• WGM20

  Waveform Generation Mode: This bit, combined with WGM21, determines the mode of operation (Normal, CTC, PWM, etc.) for Timer2.

• COM21 and COM20

  Compare Output Mode: These bits determine the behavior of the OC2 pin during compare matches and waveform generation modes.

• WGM21

  Waveform Generation Mode: Works in conjunction with WGM20 to set the mode of operation for Timer2.

• CS22, CS21, CS20

  Clock Select: These bits determine the clock source for Timer2. They also set the prescaling factor (if any).

TCNT2 (Timer/Counter Register 2)

• Counter (BIT 7-0)

  This 8-bit value represents the current value of Timer2. It counts upwards and overflows back to 0 after reaching its maximum value.

OCR2 (Output Compare Register 2)

• Compare (BIT 7-0)

  This 8-bit value is used for comparison against the TCNT2 register. When both values match, certain operations can be triggered based on the mode set in TCCR2.

Special Function IO Register – SFIOR

• PSR2 (BIT 1)

  Prescaler Reset Timer/Counter2: When written to one, the Timer/Counter2 prescaler will be reset. This bit will be cleared by hardware after the operation is performed.

• PSR10 (BIT 0)

  Prescaler Reset Timer/Counter1 and Timer/Counter0: When this bit is written to one, the Timer/Counter1 and Timer/Counter0 prescaler will be reset. The bit will be cleared by hardware after the operation is performed. Writing a zero to this bit will have no effect.

  Note that Timer/Counter1 and Timer/Counter0 share the same prescaler , and a reset of this prescaler will affect both timers. This bit will always be read as zero.

Timer/Counter Interrupt Mask Register - TIMSK

• OCIE2 (BIT 5)

  Output Compare Match Interrupt Enable: When this bit is set (1), an interrupt will be triggered when a match occurs between TCNT2 and OCR2.

• TOIE2 (BIT 4)

  Overflow Interrupt Enable: When set, an interrupt will be generated when Timer/Counter2 overflows (TCNT2 goes from its maximum value back to 0).

• TICIE1 (BIT 3)

  Input Capture Interrupt Enable: Enables the input capture interrupt for Timer/Counter1.

• OCIE1A (BIT 2)

  Output Compare Match A Interrupt Enable: Enables the interrupt when a match occurs between TCNT1 and OCR1A.

• OCIE1B (BIT 1)

  Output Compare Match B Interrupt Enable: Enables the interrupt when a match occurs between TCNT1 and OCR1B.

• TOIE1 (BIT 0 – LSB)

  Timer/Counter1 Overflow Interrupt Enable: When set, an interrupt will be generated when Timer/Counter1 overflows.

• TOIE0 (BIT 6)

  Timer/Counter0 Overflow Interrupt Enable: When set, an interrupt will be generated when Timer/Counter0 overflows (TCNT0 goes from its maximum value back to 0).

Timer/Counter Interrupt Flag Register - TIFR

• OCF2 (BIT 7)

  Output Compare Match Flag for Timer/Counter2: Set when a compare match occurs between TCNT2 and OCR2.

• TOV2 (BIT 6)

  Timer/Counter2 Overflow Flag: Set when Timer/Counter2 overflows.

• ICF1 (BIT 5)

  Input Capture Flag for Timer/Counter1: Set when an input capture event occurs on the ICP1 pin.

• OCF1A (BIT 4)

  Output Compare Match A Flag for Timer/Counter1: Set when a compare match occurs between TCNT1 and OCR1A.

• OCF1B (BIT 3)

  Output Compare Match B Flag for Timer/Counter1: Set when a compare match occurs between TCNT1 and OCR1B.

• TOV1 (BIT 2)

  Timer/Counter1 Overflow Flag: Set when Timer/Counter1 overflows.

• TOV0 (BIT 0 – LSB)

  Timer/Counter0 Overflow Flag: Set when Timer/Counter0 overflows (when it goes from its maximum value back to 0).