timer

ATmega8 Timer 1


Table Of Contents

In the realm of embedded systems, precision is paramount. Enter Timer 1 of the Atmega8 microcontroller: a versatile tool that can be a game-changer for your projects. But what makes it tick (pun intended)? Let's delve deep!

At its core, Timer 1 is a 16-bit timer/counter, which means it can count from 0 to 65,535. But why would you need such counting prowess? Well, have you ever needed to generate a precise delay, frequency, or pulse width modulation (PWM) in your project? If so, you're in the right place.

The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on the T1 pin. The Clock Select logic block controls which clock source and edge the Timer/Counter uses to increment (or decrement) its value.

The Timer/Counter is inactive when no clock source is selected. The output from the clock select logic is referred to as the timer clock (clkT1).

Timer 1 Block Diagram
Timer 1 Block Diagram

The 16-bit Timer/Counter unit allows accurate program execution timing (event management), wave generation, and signal timing measurement. The main features are:

  • True 16-bit Design (that is, allows 16-bit PWM)
  • Two Independent Output Compare Units
  • Double Buffered Output Compare Registers
  • One Input Capture Unit
  • Input Capture Noise Canceler
  • Clear Timer on Compare Match (Auto Reload)
  • Glitch-free, Phase Correct Pulse Width Modulator (PWM)
  • Variable PWM Period
  • Frequency Generator
  • External Event Counter
  • Four Independent Interrupt Sources (TOV1, OCF1A, OCF1B, and ICF1)

The 16-bit counter is mapped into two 8-bit I/O memory locations: counter high (TCNT1H) containing the upper eight bits of the counter, and Counter Low (TCNT1L) containing the lower eight bits.

The TCNT1H Register can only be indirectly accessed by the CPU. When the CPU does access to the TCNT1H I/O location, the CPU accesses the High byte temporary register (TEMP).

Timer 1 Unit Block Diagram
Timer 1 Unit Block Diagram

The temporary register is updated with the TCNT1H value when the TCNT1L is read, and TCNT1H is updated with the temporary register value when TCNT1L is written. This allows the CPU to read or write the entire 16-bit counter value within one clock cycle via the 8-bit data bus.

The Timer/Counter incorporates an Input Capture unit that can capture external events and give them a time stamp indicating time of occurrence. The external signal indicating an event, or multiple events, can be applied via the ICP1 pin or alternatively, via the Analog Comparator unit.

Timer 1 Input Capture Unit Block Diagram
Timer 1 Input Capture Unit Block Diagram

When a change of the logic level (an event) occurs on the Input Capture Pin (ICP1), alternatively on the Analog Comparator Output (ACO), and this change confirms the setting of the edge detector, a capture will be triggered.

When a capture is triggered, the 16-bit value of the counter (TCNT1) is written to the Input Capture Register (ICR1). The Input Capture Flag (ICF1) is set at the same system clock as the TCNT1 value is copied into ICR1 Register. If enabled (TICIE1 = 1), the Input Capture Flag generates an Input Capture interrupt.

The ICF1 Flag is automatically cleared when the interrupt is executed. Alternatively, the ICF1 Flag can be cleared by software by writing a logical one to its I/O bit location. Reading the 16-bit value in the Input Capture Register (ICR1) is done by first reading the Low byte (ICR1L) and then the High byte (ICR1H).

When the Low byte is read the High byte is copied into the High byte temporary register (TEMP). When the CPU reads the ICR1H I/O location it will access the TEMP Register.

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